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1K x 13 bits on-chip ROM
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48 x 8 bits on-chip registers (SRAM, general purpose)
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5-level stacks for subroutine nesting
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Less than 1.5 Ma at 5V/IRC 4 MHz
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Typically 15 Ua, at 3V/32kHz
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Typically 1 Ua, during Sleep mode
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3 programmable Level Voltage Reset (LVR):4.0V, 3.3V 2.4V
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Power-on Reset (POR): 1.8V
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1 bidirectional I/O port : P6
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Wake-up port : P6
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3 programmable pull-down I/O pins
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7 programmable pull-high I/O pins
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7 programmable open-drain I/O pins
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External interrupt : P60
Operating voltage: 2.1V~5.5V at 0C ~70C (commercial)
Operating voltage: 2.3V~5.5V at -40C ~85C (industrial)
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Operating Frequency range (base on 2 clocks):
DC~20MHz/2clks @ 5V
DC~8MHz/2clks @ 3V
DC~4MHz/2clks @ 2.1V
DC~16 MHz/2clks @ 4.5V
DC~12 MHz/2clks @ 4V
DC~4MHz/2clks @ 2.1V
(Ta=25C, VDD=5V ∮ 5%, VSS=0V)
Internal RC Frequney
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Drift Rate
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Temperature(-40C~85C)
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Voltage (2.0V~5.5V)
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Process
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Total
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455kHz
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∮5%
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∮5%
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∮3%
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∮13%
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4 MHz
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∮5%
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∮5%
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∮3%
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∮13%
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8 MHz
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∮5%
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∮5%
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∮3%
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∮13%
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16 MHz
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∮6%
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∮5%
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∮3%
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∮14%
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8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
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One comparator (typical offset voltage 10mV when input voltage range 0.5V~4.5V) with Cin+/internal Vref level select and Cin- 3 channel switch.
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One Pulse Width Modulation (PWM ) with 10-bit resolution
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High EFT immunity
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Power down mode (Sleep mode)
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Five available Interrupts:
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TCC overflow interrupt
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Input-port status changed interrupt (wake-up from sleep mode)
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External interrupt
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PWM period match completion
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Comparator output change interrupt
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Programmable prescaler of oscillator set-up time
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One security register to prevent intrusion of user's OTP memory code
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One configuration register to match user's requirements
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Two clocks per instruction cycle
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TBRD instruction
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10-pin MSOP 118mil : EM78P134NMS10J
Note: Green products do not contain hazardous substances
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